AMS Verification Engineer

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My Dutch semiconductor lawsuit pioneer ultra-efficient neuromorphic processors, important for IoT, wearables, and automotive domains.

I americium recruiting an Analog/Mixed-Signal Verification Engineer who tin heighten hierarchical verification for cutting-edge components.

Responsibilities volition see but are not constricted to:

  • Generate, verify, and optimise behavioural models for analog blocks successful mixed-signal verification.
  • Implement event-driven modelling of analog circuits, conducting Model-vs-Schematic for SoC Verification handoff.
  • Plan and coordinate analog/mixed-signal verification tasks.
  • Conduct analysis, design, and verification simulations for artifact specifications.
  • Document assigned blocks and actively enactment successful plan reappraisal meetings.

I americium looking for idiosyncratic with immoderate of the pursuing experience:

  • System-level modelling and simulation of analog and mixed-signal circuits.
  • Basic knowing of SystemVerilog and assertions (preferred).
  • Proficiency successful scripting languages (Perl oregon Python).
  • In-depth cognition of circuit analysis, optimisation, stress, and reliability analysis.
  • Familiarity with Cadence Virtuoso AMS Designer Simulator instrumentality travel (preferred).

Please get successful interaction with Parm Shergill for much information.


Contact Name: Parmeet Shergill

Reference: TJ/801/V-193669

Job ID: 3312222

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