ASIC Verification Engineer

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ASIC Verification Engineer - Bristol

Hybrid moving exemplary and a fantastic compensation package.

As a Digital Verification Senior Staff Engineer, you volition enactment wrong the IP Development squad successful Bristol, a squad with a proven way grounds successful palmy IP deliveries into Automotive Microcontrollers.

This is an breathtaking clip to articulation an established Semiconductor successful the vibrant metropolis of Bristol. Bristol is simply a metropolis straddling the River Avon successful the Southwest of England with a prosperous maritime history. Its erstwhile city-centre larboard is present a taste hub, the Harbourside, wherever the M Shed depository explores section societal and concern heritage. The harbour's 19th-century warehouses present incorporate restaurants, shops and taste institutions.

In your caller relation you will:

  • Be responsible for processing System Verilog - UVM testbenches and lick perchance analyzable problems related to trial seat development
  • Be responsible for processing close from scratch UVC components for caller verification environments;
  • Be responsible for defining and penning a functional sum model;
  • Debug failing trial cases to basal cause;
  • Participate in reviews to guarantee trial seat meets prime and is complete;
  • Contribute to verification perspective in Design and Concept meetings;
  • Ensure trial seat meets sign-off targets, including coverage, functional safety and test seat qualification;
  • Proactively help summation ratio of verification activities and mitigate risks early;
  • Contribute to enhancing Verification strategy and architecture of IP testbenches.

Key Skills

  • At least 8 years of acquisition successful Verification working with Verilog and/or SystemVerilog;
  • 5 years of acquisition connected IP/block level Test-bench bring up connected SV UVM based platform;
  • The quality to understand analyzable plan specification, derive features and trial seat architectures from concept;
  • Familiarity with CAD/EDA tools for Design and Simulation;
  • Working knowledge successful scripting languages for verification environments (e.g Python, Perl, TCL would beryllium preferred);
  • Strong background successful Digital Logic Design and Verification;

As a apical institution you tin expect ongoing grooming and support, flexible moving conditions, sabbaticals, wellness care, backstage security offers and pension plans arsenic good arsenic a compensation bundle which includes a generous basal and bonus scheme.

Visa sponsorship tin beryllium provided but relocation is simply a indispensable and distant enactment is NOT an enactment for the role.

For much information, delight interaction Rachel Mason.