IC Layout Engineer (SERDES)

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Analog IC Layout Engineer (SERDES)

This is an accidental for an IC Layout technologist to articulation a planetary marketplace person of plan solutions. In this role, you volition usage your skills successful IC Layout to alteration Semiconductors companies adopting solutions and associated IC plan methodologies. 

The Layout Engineer is expected to plan prime layouts of analog/mixed circuit blocks and enactment with planetary teams which enactment successful antithetic clip zones.

For this position, requirements include:

  • BSc required, MSc/MEng preferred successful electronics engineering oregon different applicable discipline.
  • Experience moving with customized layout designs.
  • Background successful CMOS SERDES.
  • Experience implementing precocious accuracy cells and precocious velocity circuits.
  • Experience moving with task managers and circuit designers.
  • Excellent with problem-solving skills..
  • A squad subordinate who is passionate with exertion but besides understands concern requirements.

For much accusation and to apply, delight interaction Molly


Contact Name: Molly Watkins

Reference: TJ/801/V-195938

Job ID: 3313899

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