Layout Engineer

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IC Layout Engineer - Bracknell 

A semiconductor institution based successful the Thames Valley and marketplace person successful imaging applications is looking for an Analog IC Layout Engineer to enactment an experienced squad successful the instauration of layouts of Analog Mixed Signal IC’s successful Cadence and Mentor tools for modifications to existing products and make layout solutions for caller products.

  • Your responsibilities volition see floorplanning, apical level layout, apical level verification (LVS, DRC, ERC), and top-level LPE.
  • You are the close campaigner for this relation if you are manufacture grade qualified with manufacture acquisition successful Analog IC Layout from wrong a Semiconductor company.
  • You person coagulated knowing of Analog IC Layout, Cadence Virtuoso, capacitive and inductive coupling, matching, verification and evaluation, floorplanning Analog Mixed Signal blocks.
  • In addition, you should beryllium acquainted with integer techniques specified arsenic P&R, timing-driven layout, timepiece trees, EMIR, and ESD and beryllium capable to insert blocks from these processes into Analog Mixed Signal IC Design.

For further information, interaction Molly!

Tel : +44 (0)118 907 3078


Contact Name: Molly Watkins

Reference: TJ/801/V-195481

Job ID: 3313837

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