Senior / Lead Digital Design Engineer

Sedang Trending 3 bulan yang lalu

Working for a large Semi's institution successful Grenoble, we person a precise absorbing caller relation available. You would beryllium liable for taking the lead/ownership of customer projects, depending connected your level of acquisition and quality to enactment independently.

Defining SOC architecture and moving intimately with verification, embedded and back-end teams for task definition, you'll person the accidental to enactment crossed the full integer plan flow, from conception done to delivery.

Also offering a affable and collaborative enactment environment, with a household feel!

*can besides beryllium worked remotely wrong France*

Skills / requirements:

  • Degree successful Electronics / Micro-electronics / Physics etc.
  • Processor architecture, ARM, CPU, RISC-V etc
  • SOC plan and architecture, IP integration
  • Confident quality successful RTL plan (Verilog / VHDL , SystemVerilog) for ASIC / FPGA
  • Proven quality successful tape-out and IP improvement and transportation processes

Bonus / "nice-to-have" skills:

  • High Speed Communication, Protocols - Serdes, ethernet, USB / PCIe, AXI / AMBA etc.
  • Physical plan / implementation / spot & way (P&R) for back-end
  • DFT - APTG / MBIST etc
  • STA / Timing Closure / synthesis
  • Timing closure / synthesis / power 
  • Good cognition of verification - strategy verilog and UVM processes
  • embedded bundle improvement / firmware

For much information, delight get successful interaction with your CV.

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